Efficient and Accurate Modeling and Simulation Techniques for Substrate Coupling Analysis in Deep Submicron Mixed-Signal IC’s

Phase-locked loops (PLLs) are used in wireless receivers to implement a variety of functions, such as frequency synthesis, clock recovery, demodulation, and mixed-signal integrated circuits. Substrate coupling noise is a key problem in today’s large mixed-signal systems. Switching-noise generated by digital circuits can be coupled to sensitive analog circuits through the substrate, can degrade circuit performance. Substrate noise in integrated circuits is a major impediment to mixed-signal integration. Accurate simulation is therefore, needed to investigate generation, propagation, and impact of substrate noise. The estimating an accurate modeling of noise coupling effects is a major challenge for designers. In this paper, we introduce novel substrate noise estimation and describe a fast and accurate simulation for modeling substrate coupling noise in mixed-signal RF IC design. Using a three-dimensional finite element method for extraction of substrate parasitic elements is developed. This approach allows the designer to maintain a grasp of the fundamentals using coarse models at the early stage of the design and to eventually gain insight on the lower order effects by gradually increasing the level of detail as the design develops.Copyright © 2010 Praise Worthy Prize S.r.l. All rights reserved