Numerical Simulation and Optimization for 900V 4H-SiC DiMOSFET fabrication
نویسندگان
چکیده
We report the simulation results of 25μm half cell pitch vertical type 4H-SiC DiMOSFET using the general-purpose device simulator MINIMOS-NT. The best trade-off between breakdown voltage and on-resistance in terms of BFOM is around 19MW/cm 2 with a p-well spacing 5μm. The specific on -resistance, RON, sp, simulated with VGS=10V and VDS=1V at room temperature, is around 22.76mΩcm 2 . An 900V breakdown voltage is simulated with ion-implanted edge termination.
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