VHDLDIAG+: Value-level Diagnosis of VHDL Programs
نویسندگان
چکیده
We describe the application of model-based diagnosis to the debugging of VHDL programs. In our previous work in VHDL-based software diagnosis, we have relied upon a very abstract representation to make it possible to diagnose fullsized applications (up to 1MLOC) at the cost of reduced discrimination between diagnoses. This paper describes a more detailed representation for VHDL programs that explicitly reasons about the computation of variable and signal values, making it possible to examine the internal workings of VHDL processes to find a more exact cause of the errors in a program. The higher computational effort involved requires that the new representation be used as a refinement in tandem with the older, more abstract representation. Models for the full VHDL language extent are currently being developed. The implementation is being applied to test problems.
منابع مشابه
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