Design of Electrical Stimulator with High-Voltage-Tolerant Stimulus Driver in a 0.18μm Low-Voltage CMOS Process
نویسندگان
چکیده
This paper presents an electrical stimulator with four high-voltage-tolerant output channels for cochlear implant in a 0.18μm low-voltage CMOS process. As the maximum stimulation voltage can be as high as 7 V, this stimulator only needs one single supply voltage of 1.8 V. To implement this stimulator in a low-voltage CMOS process, the dynamic bias technique and stacked MOS configuration are used to prevent from the electrical overstress and gate-oxide reliability issue.
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