Minimization of Data Address Computation Overhead in DSP Programs BERNHARD
نویسنده
چکیده
Modern digital signal processors DSPs provide dedicated address generation units AGUs which support data memory access by indirect addressing with automatic address modi cation in parallel to other machine operations There is no address computation overhead if the next address is within the auto modify range Typically optimization of data memory layout and address register assignment allows to reduce both execution time and code size of DSP programs In this paper we present an optimization technique for integrated data memory layout gener ation and address register assignment We use a generic AGU model which captures important addressing capabilities of DSPs such as linear addressing modulo addressing auto modifying and indexing within a given auto modify range Experimental results demonstrate that the proposed technique signi cantly outperforms existing optimization strategies
منابع مشابه
Minimization of data address computation overhead in DSP programs
Digital signal processors (DSPs) provide dedicated data address generation units (AGUs) with multiple register les. These units allow data memory access by indirect addressing with automatic address modi cation. Typically, both linear and modulo addressing are supported. There is no address computation overhead if the next address is within the auto-modify range. Often, this range can be adapte...
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