The Bene ts of Hardware - Assisted Fine - Grain Multithreading Kevin B . Theobald

Today there is widespread interest in using o -the-shelf computers to build economical supercomputers. Clusters such as Beowulf can use packages such as MPI to run coarsegrain parallel code. While this usually works well for applications with regular control structures and data distributions, it is not so e ective for many irregular applications. For such problems, ne-grain parallel programs express the algorithm more naturally, adapt better to changing conditions, and balance the load more e ectively. However, ne-grain parallel computing has overheads which have hurt performance, especially on o -the-shelf systems. We show that ne-grain parallel programming can be supported e ciently on such systems, if there is a suitable program execution model and a small amount of specialized hardware. We present a general model for a thread hierarchy based on bers and threaded procedures. The former are executed non-preemptively, which allows them to run e ciently on o -the-shelf processors. We show how the remaining features of the model (e.g., interaction between the bers) can be supported e ciently in a small amount of external hardware assisting a commodity processor, and that this hardware can be added in an evolutionary manner. Experiments show our hardware support signi cantly reduces multithreading overheads and improves load balancing, leading to substantial improvements in processor utilization and speedups, especially for the most ne-grained benchmarks tested.