Jack Sampson Research Statement
نویسنده
چکیده
Research Overview For several decades, improvements to CMOS process technologies fueled rapid growth in processor performance and throughput. Recently, however, power limitations have radically altered performance scaling for single-threaded applications, and the number of cores per processor has lagged behind the historical rate of transistor increase. This transition leaves architects with far more transistors than power constraints will allow them to simultaneously utilize. This in turn has lead to portions of chip area that must lay fallow at any given time in order for the design to stay within the chip’s power budget, commonly refered to as dark silicon. Further process shrinks and increasing 3D integration only serve to increase the ratio of dark silicon to active area. Thus, managing and exploiting the growth of dark silicon now looms among the largest challenges facing processor designers.
منابع مشابه
Design and architecture of automatically-generated energy- reducing coprocessors
2010 iii DEDICATION To all those willing to wait for the fruits of their labor. iv EPIGRAPH When the facts change, I change my mind. What do you do, sir?
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