Au-SN Flip-Chip Solder Bump for Microelectronic and Optoelectronic Applications

As an alternative to the time-consuming solder pre-forms and pastes currently used, a co-electroplating method of eutectic Au-Sn alloy was used in this study. Using a coelectroplating process, it was possible to plate the Au-Sn solder directly onto a wafer at or near the eutectic composition from a single solution. Two distinct phases, Au5Sn and AuSn, were deposited at a composition of 30at.%Sn. The Au-Sn flip-chip joints were formed at 300 and 400°C without using any flux. In the case where the samples were reflowed at 300°C, only an (Au,Ni)3Sn2 IMC layer formed at the interface between the Au-Sn solder and Ni UBM. On the other hand, two IMC layers, (Au,Ni)3Sn2 and (Au,Ni)3Sn, were found at the interfaces of the samples reflowed at 400°C. As the reflow time increased, the thickness of the (Au,Ni)3Sn2 and (Au,Ni)3Sn IMC layers formed at the interface increased and the eutectic lamellae in the bulk solder coarsened.