Anomalous Scaling Exponents of Capacitance –Voltage Characteristics

Capacitance-Voltage (CV) measurements along with the Mott-Schottky (MS) analysis are widely used for characterization of material and device parameters. Using a simple analytical model, supported by detailed numerical simulations, here we predict that the capacitance of thin film devices scale as V (V is the applied potential), instead of the often used V dependence of MS analysis – with significant implications towards extraction of parameters like doping density, built-in voltage, etc. Surprisingly, we find that the predicted trends are already hidden in multiple instances of existing literature. As such, our results constitute a fundamental contribution to semiconductor device physics and are directly applicable and immediately relevant to a broad range of optoelectronic devices like organic solar cells, perovskite based solar cells and LEDs, thin film a-Si devices, etc. Organic and hybrid materials based optoelectronic devices have attracted immense research focus due to their low processing cost, high flexibility, and excellent optical properties. Material and device characterization is one of the crucial steps towards identification of functional parameters that dictate the performance of electronic devices. Although widely used, the MS analysis, in this regard is strictly valid only for PN or PN device architectures. Novel optoelectronic devices such as organic solar cells, perovskite based solar cells and LEDs, 19 thin film a-Si devices often employ carrier selective PIN based architectures. However, the capacitancevoltage characteristics of such carrier selective PIN devices is not very well elucidated in the literature. Still, the MS analysis is widely used for such devices which could result in potentially erroneous extraction of critical parameters like the built-in voltage, effective doping density, and thus could negatively affect the co-optimization of fabrication and device architecture towards better performance. Therefore, it is imperative to build a theoretical platform to understand the CV characteristics of thin film PIN based optoelectronics devices. In this manuscript, we develop an analytical model for the CV characteristics of carrier selective PIN devices. In particular, we find that the capacitance is governed by the injected charge carriers from the respective contacts and scales as V (in contrast to traditional V relation). Interestingly, these analytical predictions are well supported by detailed numerical simulations. In addition, curiously, we find multiple instances of direct experimental evidence from literature which broadly supports the analytical predictions. Below, we first develop an analytical formalism for the CV of carrier selective devices and then validate it through numerical simulations and experimental data. Figure 1. Device schematic and energy band diagram of the MSM model system, with perovskite as the test material, at an applied voltage V = 0.3 V at metal contact C1. Quasi-fermi level (Fn, Fp) and electric field in active (Perovskite) layer is constant with position in the low bias regime (for V < Vbi) of carrier transport. Electrons and holes are injected from contact C2 and C1, respectively, inside perovskite with the applied voltage V. Electron density n2 = n(l) (at Perovskite/C2 interface) and hole density p1 = p(0) (at C1/Perovskite interface) are limited by electron (φn2) and hole (φp1) barrier, respectively. Analytical Model: The capacitance of a semiconductor device is a measure of response of charge carriers to a superimposed small sinusoidal signal (of a certain frequency) over a particular DC voltage. As such, it is then expected that the CV of PIN devices to be influenced by (a) the depletion region in P and N regions, and (b) the charge stored in the intrinsic as well as quasi-neutral layers. The influence of (a) on CV characteristics is rather well anticipated by the MS analysis while that of (b) is not well appreciated. To this end, we first consider a metalsemiconductor-metal (MSM) system such that the charge storage component due to the intrinsic layer is well elucidated. The analysis will then be extended to carrier selective PIN structures as well. The schematic of MSM systems is shown in Fig. 1. Here a semiconductor is sandwiched between two metal contacts C1 and C2. The workfunction of these contacts are so chosen that C1 injects