Rate optimization by true motion estimation

In this paper, we propose a rate-optimized motion estimation based on a “true” motion tracker. We observe that piecewise continuous motion field reduces the bit rate for differentially encoded motion vectors. Hence, a neighborhood relaxation method is proposed. In addition, in current MPEG-4 video VM, each video-object-plane (VOP) is individually coded by a block-based approach. The bit rate can be further improved by the removal of redundancy among the block motion vectors within the same VOP. Therefore, we also propose a object-and-block hybrid coding. INTRODUCTION In most video compression algorithms, there is always a tradeoff between picture quality and compression ratio (and computational cost). Generally speaking, the lower the compression ratio, the better the picture quality. Some researchers have attempted to develop new algorithms which can achieve higher picture quality with same amount of bits, or achieve the same picture quality with less bits. It was believed that the less the displaced frame difference (referred to as DFD or mean residue), the less the number of bits for residue, and, then, the less the total bit rate. (The less the distortion as well.) Hence, minimal DFD criterion is widely used. In some coding standards, e.g. H.261, H.263, MPEG-1, MPEG-2, which encode the motion vectors differentially within a slice [4], it is not always true that the less the DFD, the less the bit rate because the total number bits also include the number of bits of coding motion vectors. Those conventional block-matching algorithms (BMAs), which treat the motion estimation problem as an optimization problem on DFD only, could suffer from the high price on the differential coding of motion vectors [2]. Figure 1 shows the bit requirement for different vector difference in H.263 standard. The smaller the difference, the less the bits required. A rate-optimized motion estimation algorithm should take account of the total number of bits: f vig n i argmin f vig fbits DFD v Q bits v bits DFD v Q bits v bits DFDn vn Qn bits vn g (1) where vi is the motion vector of block i, vi vi vi , DFDi vi represents In [4], vi vi prediction of vi. In this paper, we assume prediction of vi vi for simplicity.