Data Path Synthesis for BIST with Low Area Overhead
نویسندگان
چکیده
This paper presents an attempt towards design quality improvement by incorporating of self-testability features during dada path (high-level) synthesis. This method is based on the use of test resource sharing possibilities to improve the self-testability of the circuit. This is achieved by incorporating testability constraints during register assignment. Experimental results are presented to demonstrate the effectiveness of the proposed data path synthesis for BIST approach.
منابع مشابه
Data Path Allocation Techniques for High-level Synthesis of Low BIST Area Overhead Designs
Built-in self-test (BIST) techniques have evolved as cost-eeective techniques for testing digital circuits. These techniques add test circuitry to the chip such that the chip has the capability to test itself. A prime concern in using BIST is the area overhead due to the modiication of normal registers to BIST registers. This paper proposes a high-level synthesis methodology that addresses this...
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