Fault Tolerant Fpga Using Redundant Columns

Fault tolerance techniques are important to increase the yield of the VLSI chips in advanced fabrication technologies. In regular structure like FPGA, redundancy is commonly used for fault tolerance. Most of the techniques found so far in literature talks about software based change in configuration data. Here in this work we present a solution in which configuration bit stream of FPGA is changed by a hardware controller that is present on the FPGA chip itself. The technique uses redundant columns for replacing faulty cells. Two variation of the technique is presented and thereafter a qualitative analysis of the tradeoffs is done.