Design of Wave Switched-Current Group Delay Equalizers

This paper describes the design of switched-current group delay equalizers. The design process is based on the pole-zero mirroring technique; with equalizer z-transfer functions generated using an optimization algorithm. To facilitate the systematic implementation of the equalizers, a model describing the design process is developed. A novel feature of the equalizers implementation is that wave structures are employed in realizing the equalizer poles instead of integrators. MATLAB and SI simulation results based on a 6-order equalizer are included. The results demonstrate that the equalizer can reduce the delay of a 5-order, 1MHz lowpass SI elliptic filter from 155ns to <20ns over the entire filter bandwidth.