Design of Flash ADC using Improved Comparator Scheme
نویسندگان
چکیده
This Paper introduced a 4 bit Flash Analog to Digital converter. The propose ADC consist of the comparators and the MUX based decoder. Propose Comparator eliminate the use of resistor ladder in the circuit. All the input of comparators are connected to the common input node. Depending upon the internal voltage of comparator and the input voltage output may be “0” or “1” known as thermometer code. This thermometer code is converted to the binary code using the MUX based decoder .This design eliminate the limitation of TIQ (Threshold Inverter Quantization) comparator. This ADC is design using the .25um technology and show the result of the proposed circuit as expected.
منابع مشابه
Algebraic Modeling of New Enhanced Linearity Threshold Comparator based Flash ADC
This paper describes flash ADC design using linearity improved threshold quantized comparator. Here, the need for a reference voltage generation network has been eliminated in a 4 bit flash ADC; with completely digital cell based comparators. Output generated from comparator called thermometer code is related mathematically with binary conversion. This conversion property is used for mathematic...
متن کاملPower and Area Efficient FLASH ADC Design using 65nm CMOS Technology
ABSTRACT This paper presents a design of a high speed Comparator design using 65nm digital CMOS technology on Cadence Virtuoso Design Tool. The proposed FLASH ADC Design consists of fully differential topology. The first stage provides a Voltage Divider circuit and the second stage is Comparator Design having high sampling frequency tolerance, and the high efficient common drain circuit provide...
متن کاملA Low Power Comparator Design for 6-Bit Flash ADC in 90-Nm CMOS
The main focus of this paper is to design a “Low power Flash ADC” for ultra-wide band applications using CMOS 90nm technology. Flash ADC consists of a reference generator, array of comparators, 1-out-of N code generator, Fat tree encoder and output D latches. The demanding issues in the design of a low power flash ADC is the design of low power latched comparator. The proposed comparator in thi...
متن کاملA 6-bit, 1-GHz Flash ADC in 0.35μm CMOS
+ Katholieke Universiteit Leuven, Kasteelpark Arenberg 10, B-3001 Heverlee, [email protected] . Abstract The design plan and measurement results of a very high-speed 6 bit CMOS Flash ADC converter are presented. The very high acquisition speed is obtained by improved comparator design. At these high frequencies power-efficient error correction logic is necessary. Measurements show th...
متن کاملA Low-Power Reduced Kick-Back Comparator with Improved Calibration for High-Speed Flash ADCs
A novel low-power kick-back reduced comparator for use in high-speed flash analog-to-digital converters (ADC) is presented. The proposed comparator combines cascode transistors to reduce the kick-back noise with a built-in threshold voltage to remove the static power consumption of a reference. Without degrading other figures, the kick-back noise is reduced by a factor 8, compared to a previous...
متن کامل