Synthesis of Adder Circuit Using Cartesian Genetic Programming
نویسندگان
چکیده
Digital adders form a significant part of the arithmetic unit in the processors. Many Digital Signal Processing (DSP) algorithms equally uses adder and multiplier element as its component to achieve the required arithmetic operation. Hence it is important to optimize the adder circuit in the gate-level itself to design it for the required standards. Recently there are various bio-inspired optimization algorithms which efficiently synthesize digital circuits like adders and multipliers. Optimization algorithms like genetic Algorithm (GA), Particle swarm optimization (PSO) and Harmony Search (HS) has proved its efficiency in various optimization problems. We utilize the conventional Cartesian genetic programming (CGP) along with the shuffling mechanism to evolve the 4X4 adder circuit using only two input NAND gate library. The evolved adder circuit is compared with the existing adder circuits to prove its performance benefits. This evolved 4-bit adder is used further to synthesis higher order adders for its real time performance benefits.
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