Optimal Structure of a Cascaded Multilevel Converter

In this paper, a topology for cascaded multilevel converter based on multilevel modules and full-bridge converters is proposed. The proposed topology significantly reduces the number of dc voltage sources, IGBTs, and power diodes as the number of output voltage levels increases. Also, an algorithm to determine dc voltage sources magnitude is proposed to synthesize maximum levels at the output voltage. The proposed topology is optimized for various objectives such as maximum number of voltage levels with constant number of IGBT’s, maximum number of voltage levels with constant number of capacitors, minimum number of IGBT’s with constant number of voltage levels, minimum number of gate driver circuits with constant number of voltage levels & minimum blocking voltage of switches with constant number of voltage levels.