A Proposed Architecture for Residue Number System based 1D 5/3 Discrete Wavelet Transform using Filter Bank and Lifting Scheme

This paper presents a novel architecture for a Residue Number System (RNS) based 1D 5/3 Discrete Wavelet Transform (DWT) implementation by using a combination of Filter Bank (FB) and Lifting Scheme (LS). It is designed to modify the architecture of existing binary lifting scheme based 5/3 DWT and RNS based Filter Bank (FB) 5/3 DWT. In this proposed architecture, non-binary RNS arithmetic operations have been used to make sure that the predict and update stages take less amount of time and the complexity is reduced by half as compared to existing binary LS. This paper also addresses the problem of critical modulo RNS division algorithm by using a special ROM based approach. Experimental results show that the proposed architecture is less complex and performs wavelet transforms at good speeds and with high accuracy. The implemented architectures have also been compared with each other to show their own advantages simultaneously. General Terms Processor Architecture, Signal Processing, Wavelet Transform, Optimization.