Special Section on Selected Papers from the 10th Karuizawa Workshop Analytical Formulas of Output Waveform and Short-Circuit Power Dissipation for Static CMOS Gates Driving a CRC Load

As MOSFET sizes and wire widths become very small in recent years, in uence of resistive component of interconnects on the estimation of propagation delay and power dissipation can no longer be neglected. In this paper we present formulas of output waveform at driving point and short-circuit power dissipation for static CMOS logic gates driving a CRC load. By representing the short-circuit current and the current owing in the resistance of a CRC load by piece-wise linear functions, a closed-form formula is derived. On the gate delay the error of our formula is less than 8% from SPICE in our experiments. These formulas will contribute to faster estimation of circuit speed and power dissipation of VLSI chips on timing level simulators. key words: short-circuit power dissipation, short-circuit current, resistive-capacitive load, CRC pi load, output waveform, gate delay