Simultaneous Routing and Bu er Insertion with Restrictions on Bu er Locations
نویسندگان
چکیده
During the routing of global interconnects, macro blocks form useful routing regions which allow wires to go through but forbid bu ers to be inserted. They give restrictions on bu er locations. In this paper, we take these bu er location restrictions into consideration and solve the simultaneous maze routing and bu er insertion problem. Given a block placement de ning bu er location restrictions and a pair of pins (a source and a sink), we give a polynomial time exact algorithm to nd a bu ered route from the source to the sink with minimum Elmore delay.
منابع مشابه
Simultaneous Routing and Bu er Insertion with
Locations Hai Zhou1, D.F. Wong1, I-Min Liu2, and Adnan Aziz2 1 Department of Computer Sciences, University of Texas, Austin, TX 78712 2 Department of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 Abstract During the routing of global interconnects, macro blocks form useful routing regions which allow wires to go through but forbid bu ers to be inserted. They give re...
متن کاملMaze Routing with Bu er Insertion and Wiresizing
We propose an elegant formulation of the Maze Routing with Bu er Insertion and Wiresizing pr oblem as a graph-the oretic shortest path problem. This formulation provides time and space performance improvements over previously proposed dynamic-programming based techniques. R outing c onstr aints such as wiring obstacles and restrictions on bu er locations and types are easily incorporated in the...
متن کاملAlgorithms for non-Hanan-based optimization for VLSI interconnectunder a higher-order AWE model
To improve the performance of critical nets where both timing and wire resources are stringent, we integrate bu er insertion and driver sizing separately with non-Hanan optimization and propose two algorithms: BINO (simultaneous Bu er Insertion and Non-Hanan Optimization) and FAR-DS (Full-plane AWE Routing with Driver Sizing). For BINO, we consider the realistic situation that bu er locations a...
متن کاملInterconnect Layout Optimization by Simultaneous Steiner Tree Construction and Bu er Insertion
This paper presents an algorithm for interconnect layout optimization with bu er insertion. Given a source and n sinks of a signal net, with given positions and a required arrival time associated with each sink, the algorithm nds a bu ered Steiner tree so that the required arrival time (or timing slack) at the source is maximized. In the algorithm, Steiner routing tree construction and bu er in...
متن کاملA Fast Algorithm for Context-Aware Bu er Insertion
We study the problem of performing bu er insertion in the con text of a giv en la yout. In a practical situation, there are restrictions on where bu ers may be inserted while routing over such regions may be possible (e.g., due to the presence of macro cells). As a result, it is desirable to perform route planning and bu er insertion sim ultaneously. Further it is necessary that such an algorit...
متن کامل