Design and Implementation of Digital Butterworth IIR filter using Xilinx System Generator for noise reduction in ECG Signal

Application Specific Integrated Circuits (ASICs) and Digital Signal Processors are generally used for implementing digital filters. Now days in the advances in technology leads to use of field programmable Gate Array (FPGA) for the implementation of Digital Filters. The Present paper deals with Design and implementation of digital IIR Butterworth filter using Xilinx System Generator. The Quantization and Overflow are main crucial parameters while designing the filter on FPGA and that need to be consider for getting the stability of the filter. As compare to the conventional DSP the speed of the system is increased by implementation on FPGA. Digital Butterworth filter first designed analytically for the desired Specifications and simulated using Simulink in Matlab environment. This paper also proposes the method to implement Digital IIR Butterworth Filter by using Xilinx system generator. The filer has shown good performance for noise removal in ECG Signal. Key–Words: Xilinx System Generator, Butterworth Filter, noise Reduction.