An Improvement of Switch-on-Future-Event Multithreading
نویسندگان
چکیده
“Delinquent” instructions are a small number of static instructions that cause most branch prediction misses and cache misses in a program. One of the important features of those delinquent instructions is that most of them are executed in small loops. We have proposed a new scheme of multithreading called Switch-on-Future-Event Multithreading (SoFE-MT) that hides a latency of delinquent instructions by multithreading execution of a loop in a single program. The conventional SoFE-MT did not assume periodic memory cache misses or memory access order violation between threads which often occur in a loop. We propose a memory access prediction system and a memory confliction detection system to deal with such problems. Simulation results shows that our proposal achieves performance improvement by an average of 2.4% and a maximum of 15.3%.
منابع مشابه
Simulation Study of Multithreaded Virtual Processor
This paper proposes the Multithreaded Virtual Processor (MVP) architecture model as a means of integrating the multithreaded programming paradigm and a modern superscalar processor with support for fast context switching and thread scheduling. In order to validate our idea, a simulator was developed using a POSIX compliant Pthreads package and a generic superscalar simulator called SimpleScalar...
متن کاملImproving http-server performance by adapted multithreading
It is wellknown that http servers can be programmed easier by using multithreading, i.e. each connection is dealt with by a separate thread. It is also known, e.g. from massively parallel programming, that multithreading can be used to hide the long latency of a remote memory access. However, the two techniques do not readily complement each other because context switches do not necessarily occ...
متن کاملMemory Intensive Computing
Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the chip, which are relatively fast, dense, and power efficient and can be considered as 'memristors'. To date, research in these devices has primarily focused on memristors as flash, DRAM, and SRAM replacement. In this presentation, we ...
متن کاملSoftware-Controlled Multithreading Using Informing Memory Operations
Memory latency is becoming an increasingly important performance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we switch between threads upon expensive cache misses. In contrast with previous work on multithreading, we explore a new approach that is software-controlled rather than hardware-controlled. To implement software-cont...
متن کاملFully Distributed Modeling, Analysis and Simulation of an Improved Non-Uniform Traveling Wave Structure
Modeling and simulation of communication circuits at high frequency are important challenges ahead in the design and construction of these circuits. Knowing the fact that the lumped element model is not valid at high frequency, distributed analysis is presented based on active and passive transmission lines theory. In this paper, a lossy transmission line model of traveling wave switch (TWSW) i...
متن کامل