A Low power 50 nm Technology Based CMOS Inverter with Sleep Transistor Scheme
نویسندگان
چکیده
This paper proposes a sleep transistor based minimum size inverter in BSIM4.3.0, 50nm CMOS technology with supply voltage of 1V, power dissipation of 46.28nW at 0.502V and maximum drain current of 70nA. The operating frequency is 1GHz. The disadvantage is decrease in voltage swing by 15% compared to the conventional CMOS Inverter of the same size, whereas the power dissipation is only 1.117% of the power dissipated by classical CMOS inverter and operating frequency is almost 2 times. It is able to satisfy the low standby power requirement and simultaneously high performance during the active mode for many mixed signal applications. Keywords— Sleep transistor, 50nm, BSIM4.3.0, Voltage Swing.
منابع مشابه
A Design Comparison of Low Power 50 nm Technology Based Inverter with Sleep Transistor and MTCMOS Scheme
ABSTRACT This paper proposes a sleep transistor based minimum size inverter in BSIM4.3.0, 50nm CMOS technology with supply voltage of 1V, power dissipation of 46.28nW at 0.502V and maximum drain current of 70nA. The operating frequency is kept at 1GHz, and found that it can be used up to 10GHz successfully. The reduction in power dissipation is 98.88% and operating frequency is almost 2 times t...
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