Buffered Clos-network packet switch with per-output flow queues

Introduction: Current advances in chip fabrication allow high on-chip memory density. However, the pin count has mainly remained the same, thus limiting the number of ports a switch chip can support. A three-stage Clos-network switch [1] uses small switch modules, called input module (IM), central module (CM), and output module (OM), to implement a large switch (i.e. with a large number of ports) with an efficient amount of hardware (e.g. number of chips). For example, a 256 × 256 switch can be implemented with 48 16 × 16 switch modules. However, the configuration time of a Clos-network switch may be long as configuration information may recur to inter-chip signalling with long delays. To reduce this configuration delay, buffers in the switch modules may be used. The placement of buffers at different stages defines the switch model, namely the memory–space–memory Clos-network (MSM) switch [2] (buffers in IMs and OMs), space– memory–memory Clos-network (SMM) switch [3] (buffers in CMs and OMs), and memory–memory–memory (MMM) Clos-network switches [4–6] (buffers in IMs, CMs, and OMs). The MSM and SMM switches require large configuration times, proportional to the switch size [2, 7]. The MMM switch performs separate selections at each stage. This reduces the configuration time and increases the scalability of the Clos-network switch. In this Letter, we follow the mainstream approach of switching fixedlength packets, called cells, in the switch. The incoming variable-length packets are segmented into cells and re-assembled before they leave the switch. Therefore, it takes a fixed amount of time, called a time slot, to forward a cell from the input of a switch module to the output of the switch module. For example, a time slot for 512-bit cells is 51.2 ns under a link rate of 10 Gbit/s. A conventional MMM Clos-network switch, or MMM switch for brevity, adopts queues, one per OM, in the CM where cells destined to different output ports of a destination OM are stored, as bufferedcrossbars can be used as off-the-shelf switch modules [4, 6]. A headof-line (HoL) cell in the queue may block the cells behind destined to other output ports that have available room in the destined OM [8]. Thus HoL blocking at the CM may occur. Switch performance degrades as HoL blocking degrades the switch throughput [9]. Therefore, avoidance of HoL blocking at the CMs in an MMM switch is needed. In this Letter, we propose an MMM Clos-network switch with peroutput flow, which is the set of packets going from input i to output j, queues in the CMs, called the MMM switch. In the MMM switch, separate queues, one dedicated queue per flow for an output port, are allocated at each crosspoint buffer in the CMs to avoid HoL blocking. We show that the MMM switch outperforms an MMM switch in terms of throughput and delay.