Design Guidelines for Optimal Results in FPGAs and ASIC Prototypes
نویسنده
چکیده
Design practices have an enormous impact on an FPGA design’s timing performance, logic utilization, and system reliability. Good design practices also aid in successful design migration between FPGA and ASIC implementations for both prototyping and production. Poor design practices can lead to low performance, high logic or resource utilization, and unstable or unreliable designs associated with increased verification time. With FPGA applications increasing in complexity and performance, good design practices are becoming an increasingly important factor in successful designs. This paper discusses how to obtain optimal results for FPGA designs and ASIC migrations by understanding the impact of synchronous design practices, following recommended design techniques, and targeting advanced FPGA architectural features.
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