An efficient implementation of multi-prime RSA on DSP processor
نویسندگان
چکیده
RSA is a popular cryptography algorithm widely used in signing and encrypting operations for security systems. Generally, the software implementations of RSA algorithm are based on 2-prime RSA. Recently multi-prime RSA has been proposed to speed up RSA implementations. Both 2-prime and multi-prime implementations require squaring reduction and multiplication reduction of multi-precision integers. Montgomery reduction algorithm is the most efficient way to do squaring and multiplication reductions. In this paper, we present a new method to implement the Montgomery squaring reduction, which speeds up squaring reduction by 10-15% for various key sizes. Furthermore, a multi-prime 1024-bit RSA signing operation is implemented on TI TMS320C6201 DSP processor with the new reduction method. As the result, signing operation can be finished within 6ms, which is about twice faster than the RSA implementation in [11] on the same DSP platform.
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