Mixed-Criticality Systems with Partial Lockdown and Cache Reclamation Upon Mode Change

نویسندگان

  • Konstantinos Bletsas
  • Muhammad Ali Awan
  • Pedro Souto
  • Benny Åkesson
  • Eduardo Tovar
  • Benny Akesson
چکیده

In mixed-criticality multicore systems, the appropriate degree of isolation between applications of different criticalities is a primary objective. However, efficient utilization of the platform 19s processing capacity and other resources is still desirable and important. In recent work, we, therefore, proposed an approach that reclaims cache resources assigned to low-criticality tasks when these are dispensed with, in the event of a system mode change. The reclaimed cache resources are reassigned from the lower-criticality tasks to the remaining highercriticality tasks to improve performance. The per-task cache partitions can either be configured to hold frequently accessed ( 1chot 1d) pages, locked in place, or they can be used dynamically, with cache lines moved in and out. The first option simplifies WCET analysis while the second option simplifies the act of cache reconfiguration at runtime.Meanwhile, the performance implications of the two options are not immediately obvious. Therefore, in this work-in-progress, we explore an arrangement that combines both approaches, in order to achieve the best tradeoff between efficient analysis, low reconfiguration overheads and good schedulability Simple per task cache partitions (without page locking) are to be used for the portion of the cache that is subject to reclamation. At mode switch, the high-criticality tasks keep the pages they had locked in the cache and get additional partitions, out of reclaimed cache, to bring other pages in and out as needed. Mixed-Criticality Systems with Partial Lockdown and Cache Reclamation Upon Mode Change Konstantinos Bletsas, Muhammad Ali Awan, Pedro Souto, Benny Akesson, Eduardo Tovar ∗CISTER Research Centre, Porto, Portugal †ISEP, Polytechnic Institute of Porto, Portugal {muaan, ksbs, kbake, emt}@isep.ipp.pt ‡ University of Porto, Faculty of Engineering, Portugal

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تاریخ انتشار 2017