Test Scheduling for Core-Based Systems1
نویسنده
چکیده
We present optimal solutions to the test scheduling problem for core-based systems. We show that test scheduling is equivalent to the m-processor open-shop scheduling problem and is therefore NP-complete. However, a commonly-encountered instance of this problem (m = 2) can be solved in polynomial time. For the general case (m > 2), we present a mixed-integer linear programming (MILP) model for optimal scheduling and apply it to a representative core-based system using an MILP solver. We also extend the MILP model to allow optimal test set selection from a set of alternatives. Finally, we present an efficient heuristic algorithm for handling larger systems for which the MILP model may be infeasible.
منابع مشابه
Accepted for Publication in Ieee Transactions on Computer-aided Design of Integrated Circuits and Systems Test Scheduling for Core-based Systems Using Mixed-integer Linear Programming
We present optimal solutions to the test scheduling problem for core-based systems. Given a set of tasks (test sets for the cores), a set of test resources (e.g. test buses, BIST hardware) and a test access architecture, we determine start times for the tasks such that the total test application time is minimized. We show that the test scheduling decision problem is equivalent to the m-processo...
متن کاملTest scheduling for core-based systems using mixed-integer linearprogramming
We present optimal solutions to the test scheduling problem for core-based systems. Given a set of tasks (test sets for the cores), a set of test resources (e.g., test buses, BIST hardware) and a test access architecture, we determine start times for the tasks such that the total test application time is minimized. We show that the test scheduling decision problem is equivalent to the -processo...
متن کاملDelay Fault Testing of Core-Based Systems-on-a-Chi
Existing approaches for modular manufacturing testing of core-based systems-on-a-chip (SOCs) do not provide any explicit mechanism for high quality two-pattern tests required for performance validation through delay fault testing. This paper proposes a new approach for broadside delay fault testing of core-based SOCs, by adapting the existing solutions for automatic test pattern generation and ...
متن کاملTest Design and Optimization for Multiple Core Systems- On-a-Chip using Genetic Algorithm
Core based design has become the de-facto design style for many VLSI design houses, as it facilitates design reuse, import of specialized expertise from external vendors and leads to a more streamlined design flow. Pre-designed cores and reusable modules are popularly used in the design of large and complex Systems-on-aChip (SOC). Embedded cores such as processors, custom application-specific i...
متن کاملOn NoC Bandwidth Sharing for the Optimization of Area Cost and Test Application Time
Current NoC test scheduling methodologies in the literature are based on a dedicated path approach; a physical path through the NoC routers and interconnects are allocated for the transportation of test data from an external tester to a single core during the whole duration of the core test. This approach unnecessarily limits test concurrency of the embedded cores because a physical channel ban...
متن کامل