Performance Analysis of Cla Circuits Using Sal and Reversible Logic Gates for Ultra Low Power Applications

Low power design has become one of the primary focuses in both analogue and digital VLSI circuits. Many power consumption techniques have come in existence and with that the low power design is also achieved by scaling supply voltage, considering sub-threshold region in this region thereby obtaining a minimum energy consumption which also suits for low operating frequencies. In this paper proposed for comparing the sub threshold logics and reversible logics power dissipations. The reversible logic design attracting more interest due to its low power consumption. Reversible logic is very important in low-power circuit design. The basic gates such as AND, OR, and EXOR are not reversible. This paper presents various designs of reversible logic gates used for reversible operation & the applications as carry look ahead adder and select adder Block. This paper also includes simulation result of reversible TSG, pers & Toffoli gate. These gates are then used to design four bit Carry look ahead adder and select Adder blocks. Methodology used for designing reversible gate is Tanner Tool Version13.0technologyfile0.18micron