Impact of lithography variability on statistical timing behavior
نویسندگان
چکیده
We describe a numerical model for chip level lithography variability analysis. Gate level critical dimensions are adjusted based on lithographic variability simulations and these perturbed gate lengths are input to a chip timing analyzer. Statistical modeling studies highlight the interaction between lithography variability and chip timing performance including the role of lithography error correlation length, optical proximity effect residuals, exposure system imperfections and photomask errors. Understanding these relationships is a critical building block for lithographic error tolerancing, design manufacturability improvement and lithography limited yield enhancements on integrated circuits for which timing is a key performance metric.
منابع مشابه
Impact of Photolithography and Mask Variability on Interconnect Parasitics *
Due to photolithography effects and manufacture process variations, the actual features printed on wafer are different from the designed ones. This difference results in the inaccuracy on parasitic extraction, which is critical for timing verification and design for manufacturability. Most of the current layout parasitic extraction (LPE) tools ignore these effects and can cause as high as 20% e...
متن کاملLibrary Compatible Variational Delay Computation
With technology steadily progressing into nanometer dimensions, precise control over all aspects of the fabrication process becomes an area of increasing concern. Process variations have immediate impact on circuit performance and behavior and standard design and signoff methodologies have to account for such variability. In this context, timing verification, already a challenging task due to t...
متن کاملCorrelation analysis of CD-variation and circuit performance under multiple sources of variability
Variability of digital integrated circuits is becoming an increasing concern with shrinking transistor geometries due to process scaling. As a result, the electrical properties of MOS devices can exhibit significant deviation from their design specifications, causing substantial variation in the performance of high-end designs. Lithography perturbations can affect a number of layout geometries,...
متن کاملThe Impact of Nano-fluid Concentration Used as an Engine Coolant on the Warm-up Timing
Running the industrial components at a proper temperature is always a big challenge for engineers. Internal combustion engines are among these components in which temperature plays a big role in their performance and emissions. With the development of new technology in the fields of ‘nano-materials’ and ‘nano-fluids’, it seems very promising to use this technology as a coolant in the interna...
متن کاملSimulation of Lithography-caused Gate Length and Interconnect Linewidth Variational Impact on Circuit Performance in Nanoscale Semiconductor Manufacturing
As the critical dimension (CD) is scaled into nanometer dimensions, operating frequencies exceed a gigahertz, and more functional blocks are added into systems on chip (SoC), interconnect has become a bottleneck in achieving the system performance [1]. In addition, scaling increases the impact of systematic intra-die CD variation (gate and metal linewidth variations) and this variation interact...
متن کامل