Design of High-Performance Analog Circuits Using Wideband gm-Enhanced MOS Composite Transistors

In this paper, we present a new composite transistor circuit design technique that provides superior performance enhancement to analog circuits. By adding a composite transistor to the cascode-compensated amplifier, it has achieved a 102 dB DC gain, and a 37.6 MHz unity gain bandwidth while driving a 2 nF heavy capacitive load at a single 1.8 V supply. In the comparison of power-bandwidth and power-speed efficiencies on figures of merit, it offers significantly high values with respect to the reported state-of-the-art works. By employing the composite transistor in a linear regulator powered by a 3.3 V supply to generate a 1.8 V output voltage, it has shown fast recovery response at various load current transients, having a 1% settling time of 0.1 μS for a 50 mA or 100 mA step, while a 1% settling time of 0.36 μS for a maximum 735 mA step under a capacitive load of 10 μF with a 1Ω ESR resistor. The simulated load regulation is 0.035% and line regulation is 0.488%. Comparing its results with other state-of-art LDO reported results, it also validates the significant enhanced performance of the proposed composite-transistor-based design in terms of speed, current driving capability and stability against changes in environmental parameters. All the proposed designs are simulated using chartered semiconductor (CSM) 1.8 V/3.3 V 0.18 μm CMOS triple-well process technology with thin/thick oxide options and BSIM3 model parameters. key words: composite transistor, cascode compensation, regulator, gain enhancement, slew rate enhancement