Dynamically Reconfigurable Intellectual Property
نویسنده
چکیده
The use of reconfiguration of field programmable gate arrays (FPGAs) to improve the area efficiency of a class of FPGA circuits is reported. The applicability of the technique to a large class of general-purpose applications is established by identifying the key characteristics of suitable circuits. The development of a new design methodology that allows the technique to be reliably deployed with repeatable results is described. The claims for improved area efficiency are supported by analysis of the design and empirical results of a case study involving a universal asynchronous transmitter receiver (UART). The empirical results point to the potential for further performance improvements in the power consumption of the experimental circuits.
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