An Efficient Parameter Extraction Methodology for the EKV MOST Model

This paper presents a new parameter extraction methodology, based on an accurate and continuous MOS model dedicated to low-voltage and low-current analog circuit design and simulation (EKV MOST Model). The extraction procedure provides the key parameters from the pinch-off versus gate voltage characteristic, measured at constant current from a device biased in moderate inversion. Unique parameter sets, suitable for statistical analysis, describe the device behavior in all operating regions and over all device geometries. This efficient and simple method is shown to be accurate for both submicron bulk CMOS and fully depleted SOI technologies. INTRODUCTION The requirements for good MOS analog simulation models such as accuracy and continuity of the largeand small-signal characteristics are well established [1][2]. Continuity of the largeand small-signal characteristics from weak to strong inversion is one of the main features of the Enz-Krummenacher-Vittoz or EKV MOS transistor model [3][4][5]. One of the basic concepts of this model is the pinch-off voltage. A constant current bias is used to measure the pinch-off voltage versus gate voltage characteristic in moderate inversion (MI). This measure allows for an efficient and simple characterization method to be formulated for the most important model parameters as the threshold voltage and the other parameters related to the channel doping, using a single measured characteristic. The same principle is applied for various geometries, including shortand narrow-channel devices, and forms the major part of the complete characterization methodology. The simplicity of the model and the relatively small number of parameters to be extracted eases the parameter extraction. This is of particular importance if large statistical data are to be gathered. This method has been validated on a large number of different CMOS processes. To show its flexibility as well as the abilities of the model, results are presented for submicron bulk and fully depleted SOI technologies. SHORT DESCRIPTION OF THE STATIC MODEL A detailed description of the model formulation can be found in [3]; important concepts are shortly recalled here since they form the basis of the parameter extraction. A set of 13 intrinsic parameters is used for first and second order effects, listed in Table I. Unlike most other MOS simulation models, in the EKV model the gate, source and drain voltages, VG , VS and VD , are all referred to the substrate in order to preserve the intrinsic symmetry of the device. The Pinch-off Voltage The threshold voltage VTO, which is consequently also referred to the bulk, is defined as the gate voltage for which the inversion charge forming the channel is zero at equilibrium. The pinch-off voltage VP corresponds to the value of the channel potential Vch for which the inversion charge becomes zero in a non-equilibrium situation. VP can be directly related to VG :