Hierarchical Architecture Design and Simulation Environment

The Hierarchical Architecture Design and Simulation Environment (HASE) is a tool for modelling and simulating computer architectures. Using HASE, designers can create and explore architectural designs at diierent levels of abstraction through a graphical interface based on X-Windows/Motif and can view the results of the simulation through animation of the design drawings. 1 The Motivation Advanced simulation tools are available for low level electronic design, such as Spice for analogue circuits, and VLSI layout tools. However, tools for rapid prototyping of architectural ideas are few and far between. Simulation languages (such as SIMULA, SIMSCRIPT, DEMOS etc) can be used to model computer architectures, but the user has to be an expert on simulation. This is also the problem of general purpose simulation tools (e.g. SES/Workbench), where icons represent`queues', `servers' etc., and the link between a queueing model of an architecture and the architecture itself is not immediately apparent to the engineer not uent in queueing theory. Conventional languages (C, C++, occam) are often used to construct simulators, but this approach involves starting from scratch for each new project. User interface aspects are often neglected as the tool will be thrown away with the next architecture. This is very wasteful, as many aspects of computers are constant between diierent architectures. The object oriented approach ooers a solution. Standard components (such as memories, microprocessors and inter-connection networks) can be held in a library. They can be constructed and linked together graphically on screen to create a simulation of an architecture, in much the same way that standard components can be wired together in a semi-custom VLSI tool. The difference is that the simulation is not xed to low level wires and chip pins, but is free to choose the appropriate abstraction level. HASE addresses one of the four \Grand Challenges in Computer Architecture" identiied by the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing 1]: ... to develop suucient infrastructure to allow rapid prototyping of hardware ideas and the associated software in a way that permits realistic evaluation. Any tool which attempts to bridge the hard-ware/software gap must provide models which are as understandable to the compiler writers working on instruction scheduling as they are to the computer engineers. Hierarchy is a fundamental concept in managing complexity for both hardware and software, so the simulation tool should be hierarchical to allow detailed simulations in areas …