THD Minimization on the Line-to-Line Voltage of Multilevel Inverters

In this paper, minimization of the total harmonics (THD) present in the output voltage of multilevel inverters is discussed . In order to reduce the harmonic contents of the inverter's output voltage the best approach is THD minimization. In multilevel inverters, if fundamental frequency switching strategy is considered,(each switch turning on and off once per output cycle), the switching angles can be selected so that the output THD is minimized. To obtain the optimum switching angles, an optimization algorithm is applied to the outputvoltage THD. In the case of three-phase multilevel inverters, the optimization algorithm is generally applied to the phase voltage of the inverter. This results in the minimum THD in phase voltage but not necessarily in the line-to-line minimum THD. In three-phase applications, the line-voltage harmonics are of the main concern from the load point of view. In this paper, using the genetic algorithm and sinusoidal PWM technique, a THD minimization process is applied to the line-to-line voltage of the inverter. This paper is based on a comparison between seven level cascaded and nine level diode clamped multilevel inverter.