Analysis of Solder Joint Reliability in Flip Chip Packages
نویسندگان
چکیده
Fatigue damage of solder joints is a serious reliability concern in electronic packaging. In this study, a flip chip package was modeled to investigate the effects of underfill material properties and BT substrate thickness on solder joint reliability. The CTE was found to have the main effect and matching CTE between underfill and solder joint is the most important consideration in the selection of underfill material. This paper also presents a creep fatigue life prediction model for thermal cycling. The model is generated by correlating nonlinear finite element analysis with experimentally measured thermal fatigue lives of flip chip packages. This creep fatigue model may be used in parametric studies assessing the influence of flip chip or FCOB design parameters on solder fatigue life.
منابع مشابه
Effect of substrate flexibility on solder joint reliability. Part II: finite element modeling
Solder joint fatigue failure is a serious reliability concern in area array technologies, such as flip chip and ball grid array packages of integrated-circuit chips. The selection of different substrate materials could affect solder joint thermal fatigue life significantly. The mechanism of substrate flexibility on improving solder joint thermal fatigue was investigated by thermal mechanical an...
متن کاملReliability Analyses for New Improved High Performance Flip Chip BGA Packages
High pin count and superior thermal dissipation are the main driving factors for high performance IC packages. Flip chip interconnects technology can generally achieve I/O count of more than 500, and large amount of heat in the silicon chip can be dissipated efficiently through metal heat spreader attachment. A one-piece cavity lid flip chip BGA package with high pin count and targeted reliabil...
متن کاملAn Overview of Solder Bump Shape Prediction Algorithms with Validations
The trend to reduce the size of electronic packages and develop increasingly sophisticated electronic devices with more, higher density inputs/outputs (I/Os), leads to the use of area array packages using chip scale packaging (CSP), flip chip (FC), and wafer level packaging (WLP) technologies. Greater attention has been paid to the reliability of solder joints and the assembly yield of the surf...
متن کاملThe Reliability Analysis and Structure Design for the Fine Pitch Flip Chip BGA Packaging
. Graduate Assistant, Ph.D candidate 2 . Corresponding Author, Professor, Dept. of Power Mechanical Engineering, National Tsing Hua University Abstract The flip chip packaging structure design and the fabrication process parameters will influence the packaging reliability and the performance of chip heat dissipation. The reliability of a flip chip package depends on the packaging structure desi...
متن کاملEndoscopic Inspection of Solder Joint Integrity in Chip Scale Packages
This paper reports, for the first time, the use of endoscopy for the nondestructive examination of solder joint integrity in chip scale packages (CSP) such as flip chip on flex (FCF). Borrowed from the medical instrument technology, the endoscope is used to examine visually the inside of an organ. This concept has now been developed and refined by ERSA and KURTZ, and led to an ERSASCOPE inspect...
متن کامل