Optimum realizations of sampled-data controllers for FWL sensitivity minimization

The problem of an optimal finite-word-length state-space realization of a digital controller is investigated. The closed loop to be considered consists of a continuous-time plant, a discrete-time controller, a sampler, a zero-order hold and an antialiasing filter. An effective algorithm is proposed to find the optimal sampled-data controller realization minimizing the sensitivity of the closed-loop performance with respect to coefficient errors in the state variable matrices of the controller realization. In order to get a tractable problem, a two-step procedure is to be used: very fast sampling at a multiple of the sampling frequency followed by ‘blocking’ or ‘lifting’ to obtain a single-rate system. The procedure allows consideration of the system’s intersample behaviour.