Novel Buffered Magnetic Logic Gate Grid

The nowadays performance limiting power dissipation due to leakage has become a critical burden. A simple way to reduce power dissipation is to shut down idle circuit parts. However, when hibernated circuit parts are activated again, their previous state must be recovered. In order to avoid energy and time consuming recovery cycles non-volatile elements must be added to realize the desired instant ON capability. In this work the combination of nonvolatile magnetic flip flops and spin transfer torque majority gates to a novel buffered magnetic logic grid is proposed. The buffered logic grid features a highly regular structure, a small layout foot print, and it reduces the information transport due to its shared buffer. The realization of an easily concatenable one-bit full adder based on the novel buffered magnetic logic gate grid is explained.