A converged hardware solution for FFT, DCT and Walsh transform

We are interested in developing a programmable baseband processor for multiple radio standards, including the wireless LAN standards 802.11a and 802.11b. 802.11a is based on OFDM and uses a 64-point FFT. Demodulation of the complementary code keying (CCK) used in 802.11b includes the computation of a modified Walsh transform. Similarities have been found between the radix-4 FFT and the fast Walsh transform (FWT) and this has enabled the design of a converged FFT and FWT processor. With small modifications this processor can also be used for calculating the discrete cosine transform (DCT). A converged FFT/FWT/DCT processor was designed and synthesized in a 0.13 m process. Results indicate that the hardware can run at 385 MHz, which means a 64-point FFT/DCT is calculated in 140 ns and a FWT for 802.11b 11Mb/s CCK in 47 ns. The area including memory is 0.40 mm.