Master Thesis Design of a 1.2 Volt Reference Voltage Stabilizer in 180nm Cmos

This master thesis describes the design of a reference voltage stabilizer in a 180 nm CMOS process technology. A voltage reference is an analog circuit block that generates a voltage of known magnitude with little dependence on supply or process variations and with a well defined dependence on temperature. The supply variations can be caused by numerous internal and external sources and over a wide range of frequencies: from a slowly declining battery level to fast transients of the switching digital circuits. The reference voltage stabilizer circuit aims to minimize the sensitivity of the reference voltage for these fluctuations. The circuit can be applied for instance to bias other circuits or stabilize the supply to other circuits as part of a voltage regulator. The assignment was to design and implement a voltage stabilization circuit, competitive to voltage reference devices currently on the market. This design assignment was provided by Axiom IC Twente. For this assignment an analysis has been made of products currently available on the market and the design aims have been set for competitive specifications. The circuit is designed and dimensioned to maintain a 1.2 volt output voltage over a wide input current range. Robustness to process variation and temperature fluctuation has been evaluated by simulation. Finally a chip layout was created for possible future fabrication and measurements.