A bus energy model for deep submicron technology
نویسندگان
چکیده
In this paper we present a comprehensive mathematical analysis of the energy dissipated in deep sub-micron (DSM) buses. The estimation is based on an elaborate bus model that includes all the distributed and lumped parasitic elements that appear as technology scales. The energy drawn from the power supply during the transition of the bus is evaluated in a compact closed form. The notion of activity of individual lines is generalized to that of the activity matrix of the bus. The activity matrix is used for statistical estimation of the power dissipation in DSM buses. Introduction A significant component of the power dissipated in digital circuits is due to long buses [1],[2]. Accurate estimation of the power drawn by the buses is important since both the peak and average power influence the optimization of the drivers and the repeaters. Even more, an energy estimation model helps in the evaluation of the performance of the digital circuit as a whole and the evaluation of possible power reduction techniques; for example, charge recycling, coding for low power, low-swing interconnect, etc., [3]-[7], [8]-[10], [11]-[13]. Until recently, a very simple bus model has been used for energy estimation. The bus lines were simply replaced by lumped capacitors to ground. Unfortunately this simple model is not adequate for DSM technology. Technology scaling introduces new dependencies that are not captured by this traditional bus model. The lines cannot be regarded as simple independent lumped elements. Instead, the lines strongly interact with each other through parasitic capacitances and inductances. Significant work has been done in modeling the behavior of DSM interconnect networks, for example, [14]-[23]. The coupled dynamic of the lines results in dependencies between the energies drawn from the power supply by their drivers. This coupling due to inter-line parasitics becomes stronger with technology scaling and is more significant than the coupling between lines and ground. The purpose of this paper is to present a compact energy model for DSM buses based on a complete distributed model for the bus that includes all the important parasitic elements. Similar work for the case of one line can be found in [24]. 1. DSM BUS MODEL In general, a bus may consist of one set of parallel lines or more with repeaters between them [25]. Here we examine the simple case of one set of parallel lines driven by CMOS inverters and loaded by the input capacitors of the next stage, as in Figure 1. The energy for the general case is the sum of the energies of all the bus stages. n 1.1 The Lines For the DSM bus of Figure 1 we adapt the distributed line model of Figure 2. The lines are assumed lossy, capacitively and inductively coupled transmission lines. This model is popular in delay and noise estimation and represents a standard modeling of DSM buses, [26]-[29]. The lines are laid along the axis and their physical length is . All the parasitic elements between lines and ground (shielding or substrate) are included in the model. The densities of the different quantities are, of the serial resistance of the i-th line, of the capacitance between the i-th line and ground, of the capacitance between lines i and j. Also, is density of the self inductance of the i-th line and of the mutual inductance between lines i and j. The densities , , , , may be functions of and vary Bus Drivers ∆x x 0 = x Lp = Repeaters or Receivers elementary segment
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ورودعنوان ژورنال:
- IEEE Trans. VLSI Syst.
دوره 10 شماره
صفحات -
تاریخ انتشار 2002