Bottleneck Analysis of a Gigabit Network Interface Card: Formal Verification Approach

This paper addresses how formal veri cation can be applied to nd a bottleneck in a gigabit network interface card that prevents the card from achieving the best possible performance. Finding a bottleneck in a gigabit network interface card is not an easy task because it is equipped with sophisticated hardware components, such as multiple DMA engines and separate CPU and memory. Therefore, the interactions between a network interface card and the host are very complex so that the rmware to manage the interactions is also complicated, which makes the bottleneck analysis very diÆcult. As an alternative approach of the bottleneck analysis, we specify the rmware in a gigabit network interface card and analyze the behavior of the speci cation with SPIN. As an example of gigabit network interface cards, Myrinet is used in this paper. We show that SPIN can easily verify whether the Myrinet rmware has a bottleneck once the state transitions inside the rmware are modeled properly.