MSC+: From Requirement to Prototyped Systems

Message Sequence Charts (MSCs) have gained wide acceptance for scenario based specification of component behaviors. MSCs are very useful during requirements capture phase of the software development process and reveal errors in requirement specifications when used in early stages. As MSCs have found widespread usage, there have been several extensions to overcome its’ shortcomings for a spectrum of applications keeping the rationale of MSCs invariant. In this paper, we propose a) An extension of hierarchical MSCs (hMSC for short), called MSC, keeping in view the need of complex reactive system specifications; it has new additional features such as preemptable watching, generalized coregion, and includes features for the specification of live and forbidden scenarios. b) A formal translation of MSC to the synchronous language ESTEREL is provided. Such a translation enables the validation of requirement specifications and derivation of prototypes for synchronous MSC specifications. c) A programming environment has been built for MSC that has a simulator, automatic ESTEREL code generator and interface to the programming environment of ESTEREL (that includes tools such as XES, XEVE, etc). d) The ability of MSC to validate a design has been exploited to check for unwanted scenarios. In the paper, we shall describe, the design and implementation of MSC as well as the programming environment for MSC that has an editor, direct simulator and an interface to ESTEREL, environment for simulation & verification. We shall illustrate the various features through typical examples. Another important demand by engineers has been to need to check An early version of the paper was presented at the 13 EuroMicro Conference on Real-Time Systems, Technical University of Delft, Delft, The Netherlands Mesfin Belachew is with the Department of Computer Science, University of Mumbai, Kalina Campus, Mumbai 400 098, India, email: [email protected] R.K. Shyamasundar is with the Faculty of Technology and Computer Science, Tata Institute of Fundamental Research, Homi Bhabha Road, Mumbai 400 005, India, email: [email protected] for unwanted scenarios. In the paper we show how our system detects the existence of the given unwanted scenarios.