Sub-threshold, Varactor-driven CMOS Floating-gate Current Memory Array with less than 150ppm/oK Temperature Sensitivity

Floating-gate (FG) transistors serve as attractive media for non-volatile storage of analog parameters. However, conventional FG current memories when used for storing sub-threshold currents are sensitive to variations in temperature which limit their applications to controlled environments. In this paper, we propose a temperature compensated, high-density array of FG current memories that can be used for storing sub-threshold currents ranging from picoamperes to nanoamperes. The core of the proposed architecture is a feedback control technique that uses a varactor to adapt the floating-gate capacitance in a manner that the temperature dependent factors are effectively canceled. As a result, the stored current is only a function of a reference current and the differential charge stored on the floating-gate. Measured results from prototype arrays fabricated in a 0.5μm CMOS process demonstrate a worst-case temperature sensitivity of 150 ppm/oK and programmability down to a few pA. In this regard, we also present a novel method to precisely program currents on the proposed floating-gate memory array by exploiting a linearizing property of the integrated varactor.