LOW - POWER SYSTOLIC ARCHITECTURESFor
نویسنده
چکیده
This paper proposes new eecient low-power systolic ar-chitectures for Full Search-Block Matching (FS-BM) motion estimation. These architectures allow to eliminate unnecessary computations, reducing the power consumption while preserving the optimal solution and the throughput. The new and traditional systolic architectures for motion estimation are compared in what concerns the required hardware and the power consumption.
منابع مشابه
A Universal Reed-Solomon Decoder
Two architecturesfor universal Reed-Solomon decoders are given. These decoders, called time-domain decoders, work directly on the raw data word as received without the usual syndrome calculation or power-sum-symmetric functions Up to the limitations of the working registers, the decoders can decode any Reed-Solomon codeword or BCH codeword in the presence of both errors and erasures. Provision ...
متن کاملLow Power Systolic Array Based Digital Filter for DSP Applications
Main concepts in DSP include filtering, averaging, modulating, and correlating the signals in digital form to estimate characteristic parameter of a signal into a desirable form. This paper presents a brief concept of low power datapath impact for Digital Signal Processing (DSP) based biomedical application. Systolic array based digital filter used in signal processing of electrocardiogram anal...
متن کاملAnxiety and hostility are associated with reduced baroreflex sensitivity and increased beat-to-beat blood pressure variability.
OBJECTIVE The purpose of this study was to determine whether psychological factors are associated with heart rate variability (HRV), blood pressure variability (BPV), and baroreflex sensitivity (BRS) among healthy middle-aged men and women. METHODS A population-based sample of 71 men and 79 women (35-64 years of age) was studied. Five-minute supine recordings of ECG and beat-to-beat photoplet...
متن کاملA Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture
We propose a sub-mW H.264 baseline-profile motion estimation processor for portable video applications. It features a VLSIoriented block partitioning strategy and low-power SIMD/systolic-array datapath architecture, where the datapath can be switched between an SIMD and systolic array depending on processing flow. The processor supports all the seven kinds of block modes, and can handle three r...
متن کاملCardiovascular variability after arousal from sleep: time-varying spectral analysis.
We performed time-varying spectral analyses of heart rate variability (HRV) and blood pressure variability (BPV) recorded from 16 normal humans during acoustically induced arousals from sleep. Time-varying autoregressive modeling was employed to estimate the time courses of high-frequency HRV power, low-frequency HRV power, the ratio between low-frequency and high-frequency HRV power, and low-f...
متن کامل