A 12b-ENOB 61μW Noise-Shaping SAR ADC with a Passive Integrator
نویسنده
چکیده
This paper presents a novel noise shaping SAR architecture that is simple, robust and low power. It is fully passive and only needs minor modification to a conventional SAR ADC. Through a passive integrator, quantization noise, comparator noise and DAC noise are shaped with a noise transfer function of (1 − 0.75z−1). Unlike conventional multi-bit deltasigma ADCs, both the noise transfer function and the error transfer function of DAC mismatches are immune to processvoltage-temperature variations. A prototype chip is fabricated in a 0.13μm CMOS process. At 1.2V and 2MS/s, the chip consumes 61μW power. SNDR increases by 6dB and the Schreier FoM increases by 3dB with OSR doubled. At an OSR of 8, SNDR is 74dB and the Schreier FoM is 167dB.
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