A Transistor Sizing Tool for Optimization of Analog CMOS Circuits: TSOp
نویسندگان
چکیده
Optimization of a circuit by transistor sizing is often a slow, tedious and iterative manual process which relies on designer intuition. It is highly desirable to automate the transistor sizing process towards being able to rapidly design high performance integrated circuit. Presented here is a simple but effective algorithm for automatically optimizing the circuit parameters by exploiting the relationships among the genetic algorithm's coefficient values derived from the analog circuit design variables. Simulation results demonstrate that the proposed algorithm (TSOp) converges to optimal solutions efficiently for the circuits which contain discrete or discontinuous parameters constraints in a large search spaces. The robustness of TSOp has been verified by using a cascaded amplifier assisted inverter and an operational amplifier circuitries based on TSMC 0.25um process technology. Even though with a large number of design variables, TSOp successfully converges to a range of optimum solution for the targeted circuit performance. TSOp achieves optimum solutions and simplifies the design steps in developing an analog circuit, thereby significantly improving the time to market for an integrated circuit chip. Keyword-Optimization, Transistor sizing, Analog design, CMOS circuit, Genetic algorithm, Pspice
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