Overcoming Bandwidth Limitations in Visual Computing

Because visual computations are very data intensive they are often limited by the bandwidth of the system rather than its peak computational performance. The trend towards many-core architectures exacerbates the problem because the parallel cores let the compute capability grow exponentially while the system bandwidth increases only linearly. At the core of the bandwidth problem in visual computing are iterative loops over discrete local operators. A typical representative is a stencil computation with constants weights or a sparse matrix vector product in case of variable weights. This computations are bandwidth limited because of their low arithmetic intensity. We have developed techniques that accelerate these loops beyond the peak bandwidth limit. While different cache friendly approaches have been tried in the past, they have never been so successful. For example our quad-core Xeon X5482 3.2GHz system reaches 22.3 GFLOPS in double precision on a stencil computation in registers. On a large 3D domain of 504 doubles and 100 iterations a handvectorized single-threaded naive stencil implementation achieves 1.6 GFLOPS and there is no improvement in the multi-threaded version because the system memory bandwidth limits the performance. A state-of-art automatic loop transformation framework Pluto [?] achieves 1.9 GFLOPS for this stencil computation with four threads. In comparison, our scheme performs already at 5.3 GFLOPS with a single thread and soars to 13.0 GFLOPS with four threads.