Bridging the Testing Speed Gap: Design for Delay Testability
نویسندگان
چکیده
The economic testing of high-speed digital ICs is becoming increasingly problematic. Even advanced, expensive testers are not always capable of testing these ICs because of their high-speed limitations. This paper focuses on a Design for Delay Testability technique such that high-speed ICs can be tested using inexpensive, lowspeed ATE. Also extensions for possible full BIST of delay faults are addressed.
منابع مشابه
Designing of Testable Reversible QCA Circuits Using a New Reversible MUX 2×1
Recently testing of Quantum-dot Cellular Automata (QCA) Circuits has attracted a lot of attention. In this paper, QCA is investigated for testable implementations of reversible logic. To amplify testability in Reversible QCA circuits, a test method regarding to Built In Self Test technique is developed for detecting all simulated defects. A new Reversible QCA MUX 2×1 desig...
متن کاملDesigning of Testable Reversible QCA Circuits Using a New Reversible MUX 2×1
Recently testing of Quantum-dot Cellular Automata (QCA) Circuits has attracted a lot of attention. In this paper, QCA is investigated for testable implementations of reversible logic. To amplify testability in Reversible QCA circuits, a test method regarding to Built In Self Test technique is developed for detecting all simulated defects. A new Reversible QCA MUX 2×1 desig...
متن کاملDesign-for-Testability Techniques for Detecting Delay Faults in CMOS/BiCMOS Logic Families
The delay fault testing in logic circuits is studied. It is shown that by detecting delayed time response in a transistor circuit, two types of faults are detected: 1) faults which cause delayed transitions at the output node due to some open defects and 2) faults which cause an intermediate voltage level at the output node. A test circuit is presented which enables the concurrent detection of ...
متن کاملDesign for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors
In this paper, we propose a design for testability method for test programs of software-based self-test using test program templates. Software-based self-test using templates has a problem of error masking where some faults detected in a test generation for a module are not detected by the test program synthesized from the test. The proposed method achieves 100% template level fault efficiency,...
متن کاملStudies on Hierarchical Two-Pattern Testability of Controller-Data Path Circuits
Two-pattern test is required to identify delay faults in a circuit. The importance of delay fault testing is increasing gradually because of the fact that traditional stuck-at fault testing is failing to guarantee an acceptable quality level for today’s high-speed chips. Some defects and/or random process variation do not change the steady state behavior of a circuit but affect the at speed per...
متن کامل