Berkeley Logic Interchange Format (blif)

The goal of blif is to d escribe a logic-level hierarchical circuit in textual form. A circuit is an arbitrary combinational or sequential network of logic functions. A circuit can be viewed as a directed graph of combinational logic nodes and sequential logic elements. Each n o d e h as a two-level, single-output logic function associated with it. Each feedback l o o p m ust contain at least one l a tch. Each n et or signal has only a single driver, and e i t her the signal or the g a te which d r i v es the signal can be named without a m biguity. In the following, angle-brackets surround nonterminals, and square-brackets surround o ptional constructs. 1 Models A m o d e l i s a a a ttened hierarchical circuit. A blif le can contain many models and references to m o d els described in other blif les. A model is declared as follows: .model decl-model-namee .inputs decl-input-list .outputs decl-output-listt .clock decl-clock-listt commandd. .. commandd .end decl-model-name is a string giving t he n ame o f t he m o d el.