Sequential Logic Optimization with Implicit Retiming and Resynthesis
نویسندگان
چکیده
This paper introduces a new logic transformation that integrates retiming with algebraic and Boolean transformations at the technology-independent level. It ooers an additional degree of freedom in sequential network optimization resulting from implicit retiming across logic blocks and fanout stems. The application of this transformation to sequential network synthesis results in the optimization of logic across register boundaries. We have implemented our new technique within the SIS framework and demonstrated its eeectiveness in terms of cycle-time minimization on a set of sequential benchmark circuits.
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